SH7014 Datasheet, PDF (274/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
10.4.6 PWM Mode
PWM mode outputs the various PWM waveforms from output pins. Output levels of 0 output, 1
output, or toggle output can be selected as the output level for the compare-match of each TGR.
A period can be set for a register by using the TGR compare-match as a counter clear source. All
channels can be independently set to PWM mode. Synchronous operation is also possible.
There are two PWM modes:
• PWM mode 1
Generates PWM output using the TGRA and TGRB registers, and TGRC and TGRD registers
as pairs. The initial output values are those established in the TGRA and TGRC registers.
When the values set in TGR registers being used as a pair are equal, output values will not
change even if a compare-match occurs.
A maximum of four-phase PWM output is possible for PWM mode 1.
• PWM mode 2
Generates PWM output using one TGR register as a period register and another as a duty cycle
register. The output value of each pin upon a counter clear is the initial value established by the
TIOR register. When the values set in the period register and duty register are equal, output
values will not change even if a compare-match occurs.
Table 10.7 lists the combinations of PWM output pins and registers.
Table 10.7 Combinations of PWM Output Pins and Registers
Output Pin
Channel
Register
PWM Mode 1
PWM Mode 2
0 (AB pair)
TGR0A
TGR0B
TIOC0A
TIOC 0A
TIOC 0B
0 (CD pair)
TGR0C
TGR0D
TIOC0C
TIOC 0C
TIOC 0D
1
TGR1A
TIOC1A
TIOC 1A
TGR1B
TIOC 1B
2
TGR2A
TIOC2A
TIOC 2A
TGR2B
TIOC 2B
Note: PWM output of the period setting TGR is not possible in PWM mode 2.
Rev.5.00 Sep. 27, 2007 Page 240 of 716
REJ09B0398-0500