SH7014 Datasheet, PDF (63/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Addressing
Mode
PC relative
addressing
Immediate
addressing
2. CPU
Instruction
Format
Effective Addresses Calculation
Equation
disp:8
The effective address is the PC value sign-extended PC + disp × 2
with an 8-bit displacement (disp), doubled, and
added to the PC value.
PC
disp
+
(sign-extended)
×
PC + disp × 2
disp:12
2
The effective address is the PC value sign-extended PC + disp × 2
with a 12-bit displacement (disp), doubled, and
added to the PC value.
PC
disp
+
(sign-extended)
×
PC + disp × 2
2
Rn
The effective address is the register PC value
PC + Rn
plus Rn.
PC
+
PC + Rn
#imm:8
#imm:8
#imm:8
Rn
The 8-bit immediate data (imm) for the TST, AND, ⎯
OR, and XOR instructions are zero-extended.
The 8-bit immediate data (imm) for the MOV, ADD, ⎯
and CMP/EQ instructions are sign-extended.
The 8-bit immediate data (imm) for the TRAPA
⎯
instruction is zero-extended and is quadrupled.
Rev.5.00 Sep. 27, 2007 Page 29 of 716
REJ09B0398-0500