SH7014 Datasheet, PDF (309/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
(1) Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Normal Mode: Figure 10.60 shows an explanatory diagram of the case where an
error occurs in normal mode and operation is restarted in normal mode after re-setting.
1
2
RESET TMDR
(normal)
MTU output
TIOC*A
3
TIOR
(1 init
0 out)
4
PFC
(MTU)
5
TSTR
(1)
6
Match
7
8
9
10 11
Error PFC TSTR TMDR TIOR
occurs (PORT) (0) (normal) (1 init
0 out)
12
PFC
(MTU)
13
TSTR
(1)
TIOC*B
Port output
PEn
Hi-Z
PEn
Hi-Z
Note: n = 0 to 15
Figure 10.60 Error Occurrence in Normal Mode, Recovery in Normal Mode
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. After a reset, the TMDR setting is for normal mode.
3. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Not necessary when restarting in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
Rev.5.00 Sep. 27, 2007 Page 275 of 716
REJ09B0398-0500