SH7014 Datasheet, PDF (161/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
8.4 DRAM Access
8.4.1 DRAM Direct Connection
When address space A31 to A24 = H'01 has been accessed, the corresponding space becomes a
16-Mbyte DRAM space, and the DRAM interface function can be used to directly connect this
LSI to DRAM.
Row address and column address are always multiplexed for DRAM space. The amount of row
address multiplexing can be selected as from 9 to 12 bits by setting the AMX1 and AMX0 bits of
the DCR.
Table 8.4
AMX1
0
1
AMX Bits and Address Multiplex Output
AMX0
0
1
0
1
Shift
Amount
9 bits
10 bits
11 bits
12 bits
Row Address
Output
Address
Output
Pins
A21 to A15 A21 to A15
A14 to A0 A23 to A9
A21 to A14 A21 to A14
A13 to A0 A23 to A10
A21 to A13 A21 to A13
A12 to A0 A23 to A11
A21 to A12 A21 to A12
A11 to A0 A23 to A12
Column Address
Output
Address
Output
Pins
A21 to A0 A21 to A0
A21 to A0 A21 to A0
A21 to A0 A21 to A0
A21 to A0 A21 to A0
In addition to ordinary read and write accesses, burst mode access using high speed page mode is
supported.
Rev.5.00 Sep. 27, 2007 Page 127 of 716
REJ09B0398-0500