SH7014 Datasheet, PDF (610/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. Electrical Characteristics (5 V 28.7 MHz)
Tp
Tr
Tc1
Tc2
Tc1
Tc2
CK
A21 to A0
RAS
CASx
(During read)
RDWR
(During read)
D15 to D0
(During read)
CASx
(During write)
RDWR
(During write)
D15 to D0
(During write)
DACKn
RD
(During read)
WRx
(During write)
t_AD
t_AD
t_ASR
Row
address
t_RASD1
t_RAH
Column address
Column address
t_RASD2
t_RP
t_CASD1
t_CASD2 t_CASD1
t_CASD2
t_CP
t_AA
t_RAC
t_CAC
t_RDS
t_AA
t_RDH
t_CAC
t_RDS
t_RDH
t_CASD1
t_CASD2
t_CASD1
t_{RWD1 tRWD2}
t_CP
t_RWD1
t_CASD2
t_RWD2
t_DS
t_WDD
t_DH
t_DS
t_{WDH tWDD}
t_DH
t_WDH
t_DACKD1
t_DACKD1
t_DACKD1
t_RSD1
t_{RSD2 tRSD1}
t_RSD2
t_WSD1
t_WSD2
t_WSD1
t_WSD2
Note: t_RDH is specified from the first negate timing for A21 to A0, RAS, and CAS.
Figure 22.14 DRAM Cycle (High-Speed Page Mode)
Rev.5.00 Sep. 27, 2007 Page 576 of 716
REJ09B0398-0500