SH7014 Datasheet, PDF (462/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Compare Match Timer (CMT)
CK
CMCNT
input clock
CMCNT
N
0
CMCOR
N
Compare
match signal
CMF
CMI
Figure 15.4 CMF Set Timing
15.4.3 Compare Match Flag Clear Timing
The CMF bit of the CMCSR register is cleared either by writing a 0 to it after reading a 1. Figure
15.5 shows the timing when the CMF bit is cleared by the CPU.
CMCSR write cycle
T₁
T₂
CK
CMF
Figure 15.5 Timing of CMF Clear by the CPU
Rev.5.00 Sep. 27, 2007 Page 428 of 716
REJ09B0398-0500