SH7014 Datasheet, PDF (569/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

A16 to A0
CE
Command write
t_ces
t_ceh
t_nxtc
18. 128 kB Flash Memory (F-ZTAT)
Memory read mode
Address stable
OE
WE
I/O7 to I/O0
t_wep
t_f
t_r
t_ds
t_dh
Note: Data is latched on the rising edge of WE.
Figure 18.20 Timing Waveforms for Memory Read after Memory Write
Table 18.14 AC Characteristics in Transition from Memory Read Mode to Another Mode
Conditions: V_CC = 5.0 V ±10%, V_SS = 0 V, T_a = 25°C ±5°C
Item
Command write cycle
CE hold time
CE setup time
Data hold time
Data setup time
Write pulse width
WE rise time
WE fall time
Symbol
t_nxtc
t_ceh
t_ces
t_dh
t_ds
t_wep
t_r
t_f
Min
20
0
0
50
50
70
Max
Unit
Notes
μs
ns
ns
ns
ns
ns
30
ns
30
ns
Rev.5.00 Sep. 27, 2007 Page 535 of 716
REJ09B0398-0500