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| SH7014 Datasheet, PDF (612/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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22. Electrical Characteristics (5 V 28.7 MHz)
Ta1 Ta2 Ta3 Ta4 T1 TW TWo T2
CK
A21 to A0
CS3
AH
tAD
tCSD1
tAHD1
RD
(During read)
D15 to D0
(During read)
WRx
(During write)
D15 to D0
(During write)
tMAD
tMAD
WAIT
DACKn
tDACKD1
tAHD2
tCSD2
tRSD1
tMAH
tRSD2
tRDS
tRDH
tWSD1
tMAH
tWDD
tWTS tWTH tWTS tWTH
tWSD2
tWDH
tDACKD1
Note: tRDH is specified from the first negate timing for A21 to A0, CS3, and RD.
Figure 22.17 Address Data Multiplex I/O Space Cycle (1 Software Wait + 1 External Wait)
Rev.5.00 Sep. 27, 2007 Page 578 of 716
REJ09B0398-0500
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