SH7014 Datasheet, PDF (193/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

9. Direct Memory Access Controller (DMAC)
9.2.5 DMAC Operation Register (DMAOR)
The DMAOR is a 16-bit read/write register that specifies the transfer mode of the DMAC. Bits 15
to 3 of this register always read as 0. The write value should always be 0.
Register values are initialized to 0 during power-on reset or in software standby mode.
Bit: 15
14
13
12
11
10
9
8
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
⎯
⎯
⎯
⎯
⎯
AE NMIF DME
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R R/(W)* R/(W)* R
Note: * 0 write only is valid after 1 is read.
Bit 2⎯Address Error Flag (AE): Indicates that an address error has occurred during DMA
transfer. If this bit is set during a data transfer, transfers on all channels are suspended. The CPU
cannot write a 1 to the AE bit. Clearing is effected by 0 write after 1 read.
Bit 2
AE
0
1
Description
No address error, DMA transfer enabled
Clearing condition: Write AE = 0 after reading AE = 1
Address error, DMA transfer disabled
Setting condition: Address error due to DMAC
(initial value)
Rev.5.00 Sep. 27, 2007 Page 159 of 716
REJ09B0398-0500