SH7014 Datasheet, PDF (62/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

2. CPU
Addressing
Mode
Instruction
Format
Effective Addresses Calculation
Equation
Indirect indexed @(R0, GBR) The effective address is the GBR value plus the R0. GBR + R0
GBR addressing
GBR
+
GBR + R0
R0
PC relative
addressing with
displacement
@(disp:8, The effective address is the PC value plus an 8-bit
PC)
displacement (disp). The value of disp is zero-
extended, and is doubled for a word operation, and
quadrupled for a longword operation. For a
longword operation, the lowest two bits of the PC
value are masked.
Word: PC +
disp × 2
Longword:
PC &
H'FFFFFFFC
+ disp × 4
PC
(for longword)
&
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC & H'FFFFFFFC
+ disp × 4
2/4
Rev.5.00 Sep. 27, 2007 Page 28 of 716
REJ09B0398-0500