SH7014 Datasheet, PDF (662/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
MTU
Bit
0
Note: *
Name
Input Capture/Output Compare
Flag A (TGFA)
Value
0
1
Cleared by DMAC transfer due to TGFA.
Description
Clear condition: With TGFA = 1, a 0 write to TGFA
following a read*
(initial value)
Set conditions:
• When TGRA is functioning as an output compare
register (TCNT = TGRA)
• When TGRA is functioning as input capture (the
TCNT value is sent to TGRA by the input capture
signal)
Timer Counters 0 (TCNT0)
H'FFFF8266
16/32
Bit
Item
15 14 13 12 11 10 9
87654
3210
Bit name
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Timer General Register 0 (TGR0)
H'FFFF8268 (0A)
H'FFFF826A (0B)
H'FFFF826C (0C)
H'FFFF826E (0D)
16/32
Bit
Item
15 14 13 12 11 10 9
87654
3210
Bit name
Initial value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Rev.5.00 Sep. 27, 2007 Page 628 of 716
REJ09B0398-0500