SH7014 Datasheet, PDF (686/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
SCI
Bit
2
1
0
Notes:
Name
Value
Description
Transmit End (TEND)
0 Transmission is in progress
Clearing conditions:
• When 0 is written to TDRE after reading TDRE = 1
• When DMAC writes data in TDR
1 End of transmission
Clearing conditions:
• Power-on reset or standby mode
(initial value)
• When the TE bit in SCR is 0
• When TDRE = at transmission of the last bit of a
1-byte serial transmit character
Multiprocessor Bit (MPB)
0 Multiprocessor bit value in receive data is 0*⁷ (initial value)
1 Multiprocessor bit value in receive data is 1
Multiprocessor Bit Transfer
(MPBT)
0 Multiprocessor bit value in transmit data is 0 (initial value)
1 Multiprocessor bit value in transmit data is 1
1. The ORER flag is not affected and retains their previous values when the RE bit in SCR is cleared
to 0.
2. RDR continues to hold the data received before the overrun error, so subsequent receive data is
lost. Serial receiving cannot continue while ORER is set to 1. In the clock synchronous mode,
serial transmitting is disabled.
3. The FER flag is not affected and retains their previous values when the RE bit in SCR is cleared to
0.
4. When the stop bit length is two bits, only the first bit is checked to see if it is a 1. The second stop
bit is not checked. When a framing error occurs, the SCI transfers the receive data into the RDR
but does not set RDRF. Serial receiving cannot continue while FER is set to 1. In the clock
synchronous mode, serial transmitting is also disabled. In addition, serial transmission cannot
continue in clock synchronous mode.
5. The PER flag is not affected and retains their previous values when the RE bit in SCR is cleared to
0.
6. When a parity error occurs, the SCI transfers the receive data into the RDR but does not set
RDRF. Serial receiving cannot continue while PER is set to 1. In the clock synchronous mode,
serial transmitting is also disabled. In addition, serial transmission cannot continue in clock
synchronous mode.
7. If RE is cleared to 0 when a multiprocessor format is selected, the MPB retains its previous value.
Rev.5.00 Sep. 27, 2007 Page 652 of 716
REJ09B0398-0500