SH7014 Datasheet, PDF (603/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

CK
A21 to A0
CSn
RD
(During read)
D15 to D0
(During read)
WRx
(During write)
D15 to D0
(During write)
DACKn
T1
t_AD
t_CSD1
t_RSD1
t_WSD1
t_AS
t_WDD
t_DACKD1
22. Electrical Characteristics (5 V 28.7 MHz)
Tw
T2
t_OE
t_ACC
t_CSD2
t_RSD2
t_RDS
t_RDH
t_{WSD2 tWR}
t_WRH
t_WDH
t_DACKD1
Note: t_RDH is specified from the first negate timing for A21 to A0, CSn, and RD.
Figure 22.7 Basic Cycle (Software Waits)
Rev.5.00 Sep. 27, 2007 Page 569 of 716
REJ09B0398-0500