SH7014 Datasheet, PDF (180/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
8.10 CPU Operation when Program Is in External Memory
In the SH7014, SH7016, and SH7017 F-ZTAT™, two words (equivalent to two instructions) are
normally fetched in a single instruction fetch. This is also true when the program is located in
external memory, irrespective of whether the external memory bus width is 8 or 16 bits.
If the program counter value immediately after the program branches is an odd-word (2n + 1)
address, or if the program counter value immediately before the program branches is an even-word
(2n) address, the CPU will always fetch 32 bits (equivalent to two instructions) that include the
respective word instruction.
Rev.5.00 Sep. 27, 2007 Page 146 of 716
REJ09B0398-0500