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SH7014 Datasheet, PDF (609/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
22. Electrical Characteristics (5 V 28.7 MHz)
Tp
Tr
Tc1 Tcw1 Tcw2 Tcwo Tc2
CK
A21 to A0
RAS
CASx
(During read)
RDWR
(During read)
D15 to D0
(During read)
CASx
(During write)
RDWR
(During write)
D15 to D0
(During write)
WAIT
DACKn
RD
(During read)
WRx
(During write)
tAD
tAD
tASR
Row
address
tRASD1
tRAH
tRP
Column address
tCASD1
tRASD2
tCASD2
tCAC
tAA
tRAC
tCASD1
tRDS
tRDH
tCASD2
tRWD1
tWDD tDS
tDH
tWTS tWTH tWTS tWTH
tDACKD1
tRWD2
tWDH
tDACKD1
tRSD1
tWSD1
tRSD2
tWSD2
Note: tRDH is specified from the first negate timing for A21 to A0, RAS, and CAS.
Figure 22.13 DRAM Cycle (Normal Mode, 2 Waits + Wait due to WAIT Signal)
Rev.5.00 Sep. 27, 2007 Page 575 of 716
REJ09B0398-0500