SH7014 Datasheet, PDF (179/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
SH7014/16/17
RAS
RDWR
A0 to A9
CASL
AD0 to AD7
512 k × 8 bits
DRAM
RAS
WE
OE
A0 to A9
CAS
I/O0 to I/O7
Figure 8.26 8-Bit Data Bus Width DRAM Connection
SH7014/16/17
RAS
RDWR
A0
A1 to A9
CASH
CASL
AD0 to AD15
256 k × 16 bits
DRAM
RAS
WE
OE
A0 to A8
UCAS
LCAS
I/O0 to I/O15
Figure 8.27 16-Bit Data Bus Width DRAM Connection
8.9 On-chip Peripheral I/O Register Access
On-chip peripheral I/O registers are accessed from the bus state controller, as shown in Table 8.5.
Table 8.5 On-chip Peripheral I/O Register Access
On-chip Peripheral
Module
SCI
MTU
INTC
PFC,
PORT CMT
A/D*
WDT
DMAC CACHE
Connected bus width 8bit
16bit 16bit 16bit 16bit 16bit 16bit 16bit 16bit
Access cycle
2cyc 2cyc 2cyc 2cyc 2cyc 2cyc 3cyc 3cyc 3cyc
Note: * The A/D in the SH7016 and SH7017 has an 8-bit width and is accessed in 3 cyc.
Rev.5.00 Sep. 27, 2007 Page 145 of 716
REJ09B0398-0500