SH7014 Datasheet, PDF (229/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
10.1.2 Block Diagram
Figure 10.1 is the block diagram of the MTU.
(Clock input)
Internal clock:
φ/1
φ/4
φ/16
φ/64
φ/256
φ/1024
External clock:
TCLKA
TCLKB
TCLKC
TCLKD
(I/O pins)
Channel 0:
TIOC0A
TIOC0B
TIOC0C
TIOC0D
Channel 1:
TIOC1A
TIOC1B
Channel 2:
TIOC2A
TIOC2B
Internal data bus
A/D conversion
start request signal
Figure 10.1 MTU Block Diagram
(Interrupt
request signal)
Channel 0:
TGI0A
TGI0B
TGI0C
TGI0D
TGI0V
Channel 1:
TGI1A
TGI1B
TGI1V
TGI1U
Channel 2:
TGI2A
TGI2B
TGI2V
TGI2U
Rev.5.00 Sep. 27, 2007 Page 195 of 716
REJ09B0398-0500