SH7014 Datasheet, PDF (152/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
Bits 1 and 0⎯DRAM Address Multiplex (AMX1 and AMX0): Specifies the DRAM address
multiplex count.
Bit 1
AMX1
0
1
Bit 0
AMX0
0
1
0
1
Description
9 bit
10 bit
11 bit
12 bit
(initial value)
8.2.6 Refresh Timer Control/Status Register (RTCSR)
RTCSR is a 16-bit read/write register that selects the refresh mode and the clock input to the
refresh timer counter (RTCNT), and controls compare match interrupts (CMI).
RTCSR is initialized by power-on resets to H'0000, but is not initialized by software standbys.
Bit: 15
14
13
12
11
10
9
8
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
⎯
Initial value: 0
R/W: R
6
CMF
0
R/W
5
CMIE
0
R/W
4
CKS2
0
R/W
3
CKS1
0
R/W
2
CKS0
0
R/W
1
RFSH
0
R/W
0
RMD
0
R/W
Bits 15 to 7⎯Reserved: These bits always read as 0. The write value should always be 0
Rev.5.00 Sep. 27, 2007 Page 118 of 716
REJ09B0398-0500