SH7014 Datasheet, PDF (646/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
BSC
Wait Control Register 2 (WCR2)
H'FFFF8626
8/16/32
Item
15
Bit name
―
Initial value
0
R/W
R
Item
7
Bit name
―
Initial value
0
R/W
R
Bit
14
13
12
11
10
9
8
―
―
―
―
―
―
―
0
0
0
0
0
0
0
R
R
R
R
R
R
R
6
5
4
3
2
1
0
―
DDW1
DDW0
DSW3
DSW2
DSW1
DSW0
0
0
0
1
1
1
1
R
R/W
R/W
R/W
R/W
R/W
R/W
Bit
5, 4
3 to 0
Name
DRAM Space DMA Single
Address Mode Access Wait
Specification (DDW1, DDW0)
CS Space DMA Single
Address Mode Access Wait
Specification (DSW3 to
DSW0)
Value
0
0
0
1
1
0
1
1
0000
0001
…
1111
Description
2-cycle (no wait) external wait disabled
(initial value)
3-cycle (1 wait) external wait disabled
4-cycle (2 wait) external wait enabled
5-cycle (3 wait) external wait enabled
No wait (external wait input disabled)
1 wait (external wait input enabled)
15 wait (external wait input enabled)
(initial value)
DRAM Area Control Register (DCR)
H'FFFF862A
8/16/32
Item
Bit name
Initial value
R/W
Item
Bit name
Initial value
R/W
15
TPC
0
R/W
7
DIW
0
R/W
14
RCD
0
R/W
6
―
0
R
13
TRAS1
0
R/W
5
BE
0
R/W
Bit
12
11
TRAS0 DWW1
0
0
R/W
R/W
4
3
RASD
―
0
0
R/W
R
10
DWW0
0
R/W
2
SZ0
0
R/W
9
DWR1
0
R/W
1
AMX1
0
R/W
8
DWR0
0
R/W
0
AMX0
0
R/W
Rev.5.00 Sep. 27, 2007 Page 612 of 716
REJ09B0398-0500