SH7014 Datasheet, PDF (361/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. Serial Communication Interface (SCI)
The BRR setting is calculated as follows:
Asynchronous mode:
N
=
64
×
φ
2^2n−1
×
B
×
10⁶
−
1
Synchronous mode:
N
=
64
×
φ
2^2n−1
×
B
×
10⁶
−
1
Legend:
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
φ: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the following table for the clock sources and value of n.)
SMR Settings
n
Clock Source
CKS1
CKS2
0
φ
0
0
1
φ/4
0
1
2
φ/16
1
0
3
φ/64
1
1
The bit rate error in asynchronous mode is calculated as follows:
Error
(%)
=
⎧
⎨⎩_(N
+
1)
φ × 10⁶
× B × 64
×
2^2n−1
−
1
× 100
Table 12.5 indicates the maximum bit rates in the asynchronous mode when the baud rate
generator is being used for various frequencies. Tables 12.6 and 12.7 show the maximum rates for
external clock input.
Rev.5.00 Sep. 27, 2007 Page 327 of 716
REJ09B0398-0500