SH7014 Datasheet, PDF (120/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6. Interrupt Controller (INTC)
Program
execution state
Interrupt?
No
Yes
NMI?
No
Yes
Save SR to stack
Save PC to stack
Copy accept-interrupt
level to I3 to I0
Reads exception
vector table
Branches to exception
service routine
Level 15 No
interrupt?
Yes
Yes _{I3 to I0 ≤}
level 14?
Level 14
interrupt?
Yes
No _{Yes I3 to I0 ≤}
level 13?
No
Level 1 ^No
interrupt?
Yes
No Yes
I3 to I0 =
level 0?
No
Legend:
I3 to I0: Interrupt mask bits of status register
Figure 6.3 Interrupt Sequence Flowchart
Rev.5.00 Sep. 27, 2007 Page 86 of 716
REJ09B0398-0500