SH7014 Datasheet, PDF (155/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
8.2.7 Refresh Timer Counter (RTCNT)
RTCNT is a 16-bit read/write register that is used as an 8-bit up counter for refreshes or generating
interrupt requests.
RTCNT counts up with the clock selected by the CKS2 to CKS0 bits of the RTCSR. RTCNT
values can always be read/written by the CPU. When RTCNT matches RTCOR, RTCNT is
cleared to H'0000 and the CMF flag of the RTCSR is set to 1. If the RFSH bit of RTCSR is 1 and
the RMD bit is 0 at this time, a CAS-before-RAS refresh is performed. Additionally, if the CMIE
bit of RTCSR is a 1, a compare match interrupt (CMI) is generated.
Bits 15 to 8 are reserved and play no part in counter operation. They are always read as 0.
RTCNT is initialized by power-on resets to H'0000, but is not initialized by software standbys.
Bit: 15
14
13
12
11
10
9
8
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Rev.5.00 Sep. 27, 2007 Page 121 of 716
REJ09B0398-0500