SH7014 Datasheet, PDF (256/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Bits 2 to 0⎯Counter Start 4 to 0 (CST4 to CST0): Select the start and stop of the timer counters
(TCNT). The counter start to channel and bit to channel correspondence are indicated in the tables
below.
Counter Start
CST2
CST1
CST0
Channel
Channel 2 (TCNT2)
Channel 1 (TCNT1)
Channel 0 (TCNT0)
Bit n
CSTn
Description
0
TCNTn count is halted
(initial value)
1
TCNTn counts
Note:
n = 2 to 0.
If 0 is written to the CST bit during operation with the TIOC pin in output status, the counter
stops, but the TIOC pin output compare output level is maintained. If a write is done to the
TIOR register while the CST bit is a 0, the pin output level is updated to the established
initial output value.
Bits 7 to 3⎯Reserved: These bits always read as 0. The write value should always be 0.
10.2.9 Timer Synchro Register (TSYR)
The timer synchro register (TSYR) is an 8-bit read/write register that selects independent or
synchronous TCNT counter operation for channels 0 to 2. Channels for which 1 is set in the
corresponding bit will be synchronized. TSYR is initialized to H'00 upon power-on reset or
standby mode.
Bit: 7
6
5
4
3
2
1
0
⎯
⎯
⎯
⎯
⎯ SYNC2 SYNC1 SYNC0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R/W R/W R/W
Rev.5.00 Sep. 27, 2007 Page 222 of 716
REJ09B0398-0500