SH7014 Datasheet, PDF (551/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

MOV.B
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.ALIGN
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R0,@(FLMCR1,GBR)
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.RES.B 32
18. 128 kB Flash Memory (F-ZTAT)
; Clear SWE
18.7.3 Erase Mode
When erasing flash memory, the erase/erase-verify flowchart shown in figure 18.14 should be
followed.
To perform data or program erasure, set the 1 bit flash memory area to be erased in erase block
register 1 (EBR1) at least 10 μs after setting the SWE bit to 1 in flash memory control register 1
(FLMCR1). Next, the watchdog timer is set to prevent overerasing in the event of program
runaway, etc. Set 9.2 ms as the WDT overflow period. After this, preparation for erase mode
(erase setup) is carried out by setting the ESU bit in FLMCR1, and after the elapse of 200 μs or
more, the operating mode is switched to erase mode by setting the E bit in FLMCR1. The time
during which the E bit is set is the flash memory erase time. Ensure that the erase time does not
exceed 5 ms.
Note: With flash memory erasing, preprogramming (setting all memory data in the memory to
be erased to all “0”) is not necessary before starting the erase procedure.
Rev.5.00 Sep. 27, 2007 Page 517 of 716
REJ09B0398-0500