SH7014 Datasheet, PDF (108/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6. Interrupt Controller (INTC)
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ6
IRQ7
Input
control
DMAC
MTU
CMT
SCI
A/D
WDT
BSC
(Interrupt request)
(Interrupt request)
(Interrupt request)
(Interrupt request)
(Interrupt request)
(Interrupt request)
(Interrupt request)
CPU
Priority
ranking
judg-
ment
Com-
parator
Interrupt
request
SR
I3 I2 I1 I0
CPU
ICR
IPR
ISR
IPRA to IPRH
Module bus
INTC
Bus
interface
Legend:
DMAC: Direct memory access controller
MTU: Multifunction timer pulse unit
CMT: Compare match timer
SCI: Serial communication interface
A/D: A/D converter
WDT: Watchdog timer
BSC: Bus state controller (DRAM
ICR:
Interrupt control register
ISR:
IRQ ststus register
IPRA to IPRH: Interrupt priority
registers A to H
SR:
Status register
Figure 6.1 INTC Block Diagram
Rev.5.00 Sep. 27, 2007 Page 74 of 716
REJ09B0398-0500