SH7014 Datasheet, PDF (190/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

9. Direct Memory Access Controller (DMAC)
Bits 13 and 12⎯Source Address Mode 1, 0 (SM1 and SM0): These bits specify
increment/decrement of the DMA transfer source address. These bit specifications are ignored
when transferring data from an external device to address space in single address mode.
Bit 13
SM1
0
1
Bit 12
SM0
0
1
0
1
Description
Source address fixed
(initial value)
Source address incremented (+1 during 8-bit transfer, +2
during 16-bit transfer, +4 during 32-bit transfer)
Source address decremented (−1 during 8-bit transfer, −2
during 16-bit transfer, −4 during 32-bit transfer)
Setting prohibited
Bits 11 to 8⎯Resource Select 3 to 0 (RS3 to RS0): These bits specify the transfer request
source.
Bit 11
RS3
0
Bit 10
RS2
0
Bit 9
RS1
0
1
1
0
1
1
0
0
1
1
0
1
Bit 8
RS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
External request, dual address mode
(initial value)
Prohibited
External request, single address mode. External address
space → external device.
External request, single address mode. External device →
external address space.
Auto-request
Prohibited
MTU TGI0A
MTU TGI1A
MTU TGI2A
Prohibited
Prohibited
A/D ADI
SCI0 TXI0
SCI0 RXI0
SCI1 TXI1
SCI1 RXI1
Rev.5.00 Sep. 27, 2007 Page 156 of 716
REJ09B0398-0500