SH7014 Datasheet, PDF (235/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Bits 4 and 3⎯Clock Edge 1, 0 (CKEG1 and CKEG0): CKEG1 and CKEG0 select the input
clock edges. When counting is done on both edges of the internal clock the input clock frequency
becomes 1/2 (Example: both edges of φ/4 = rising edge of φ/2). When phase count mode is used
with channels 1, 2, these settings are ignored, as the phase count mode settings have priority.
Bit 4 Bit 3
CKEG1 CKEG0 Description
0
0
Count on rising edges
(initial value)
1
Count on falling edges
1
X
Count on both rising and falling edges
Notes: 1. X: 0 or 1, don't care.
2. Internal clock edge selection is effective when the input clock is φ/4 or slower. These
settings are ignored when φ/1, or the overflow/underflow of another channel is selected
for the input clock.
Bits 2 to 0⎯Timer Prescaler 2 to 0 (TPSC2 to TPSC0): TPSC2 to TPSC0 select the counter
clock source for the TCNT. An independent clock source can be selected for each channel. Table
10.4 shows the possible settings for each channel.
Table 10.4 MTU Clock Sources
Internal Clock
φ/ φ/
Channel φ/1 φ/4 16 64
0
OOOO
1
OOOO
2
OOOO
Note:
Symbols:
O: Setting possible
X: Setting impossible
Other Channel ^{External Clock}
φ/ φ/ Overflow/
TCL TCL TCL TCL
256 1024 Underflow
KA KB KC KD
XXX
OOOO
OX O
OOX X
X OX
OOOX
Rev.5.00 Sep. 27, 2007 Page 201 of 716
REJ09B0398-0500