SH7014 Datasheet, PDF (416/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. High Speed A/D Converter ⎯ SH7014 ⎯
The ADF flag is set to 1 at the completion of the first conversions of all the designated input
channels. At this point, if the ADIE bit is set to 1, an ADI interrupt request is issued, and the high
speed A/D converter is temporarily halted. With the high speed A/D converter in stop mode due to
an ADI interrupt request, conversion is restarted when the ADF flag is cleared to 0. The ADF flag
is cleared by reading the ADCSR, then writing a 0.
Figure 13.6 shows an example of operation in the group-scan mode when AN0 to AN2 are
selected.
ADF
Conversion standby
ADST
Set to 1 by software
Conver- _Sam-
Channel 0 ^{sion pling}
standby ₁
A/D
conver-
sion 1
Cleared to 0 by software
Sam-
pling
4
A/D
conver-
sion 4
Conver-
sion
stopped
Channel 1
Conversion
standby
Sam-
pling
2
A/D Conver-
conver- sion
sion 2 standby
Sam-
pling
5
A/D
conver-
sion 5
Channel 2
Conversion standby
Sam-
pling
3
A/D Conver-
conver- sion
sion 3 standby
Sam-
pling
6
Channel 3
Conversion standby
ADDRA
Conversion result 1
Conversion result 4
ADDRB
ADDRC
ADDRD
Conversion result 2
Conversion result 5
Conversion result 3
Figure 13.6 High Speed A/D Converter Operation Example (Group-Scan Mode)
Rev.5.00 Sep. 27, 2007 Page 382 of 716
REJ09B0398-0500