SH7014 Datasheet, PDF (289/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Input Capture Signal Timing: Figure 10.38 illustrates input capture timing.
φ
Input capture
input
Input capture
signal
TCNT
Rising edge
Falling edge
N
N+1
N+2
TGR
N
N+2
Figure 10.38 Input Capture Input Signal Timing
Counter Clearing Timing Due to Compare-Match/Input Capture: Timing for counter clearing
due to compare-match is shown in figure 10.39. Figure 10.40 shows the timing for counter
clearing due to input capture.
φ
Compare-
match signal
Counter
clear signal
TCNT
N
H'0000
TGR
N
Figure 10.39 Counter Clearing Timing (Compare-Match)
Rev.5.00 Sep. 27, 2007 Page 255 of 716
REJ09B0398-0500