SH7014 Datasheet, PDF (129/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

7. Cache Memory (CAC)
Bit 3⎯CS3 Space Cache Enable (CECS3): Selects whether to use CS3 space as a cache object
(enable) or to exclude it (disable). A 0 disables, and a 1 enables such use.
Bit 3
CECS3
0
1
Description
CS3 space cache disabled
CS3 space cache enabled
(initial value)
Bit 2⎯CS2 Space Cache Enable (CECS2): Selects whether to use CS2 space as a cache object
(enable) or to exclude it (disable). A 0 disables, and a 1 enables such use.
Bit 2
CECS2
0
1
Description
CS2 space cache disabled
CS2 space cache enabled
(initial value)
Bit 1⎯CS1 Space Cache Enable (CECS1): Selects whether to use CS1 space as a cache object
(enable) or to exclude it (disable). A 0 disables, and a 1 enables such use.
Bit 1
CECS1
0
1
Description
CS1 space cache disabled
CS1 space cache enabled
(initial value)
Bit 0⎯CS0 Space Cache Enable (CECS0): Selects whether to use CS0 space as a cache object
(enable) or to exclude it (disable). A 0 disables, and a 1 enables such use.
Bit 0
CECS0
0
1
Description
CS0 space cache disabled
CS0 space cache enabled
(initial value)
Rev.5.00 Sep. 27, 2007 Page 95 of 716
REJ09B0398-0500