SH7014 Datasheet, PDF (298/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
10.7.4 Contention between TCNT Write and Increment
If a count-up signal is issued in the T₂ state during the TCNT write cycle, TCNT write has priority,
and the counter is not incremented (figure 10.51).
TCNT write cycle
T₁
T₂
φ
Address
TCNT address
Write signal
TCNT input
clock
TCNT
N
M
TCNT write data
Figure 10.51 TCNT Write and Increment Contention
Rev.5.00 Sep. 27, 2007 Page 264 of 716
REJ09B0398-0500