SH7014 Datasheet, PDF (688/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
A/D (SH7014)
A/D Data Registers A to H (ADDRA to ADDRH)
H'FFFF83F0
8/16
H'FFFF83F2
H'FFFF83F4
H'FFFF83F6
H'FFFF83F8
H'FFFF83FA
H'FFFF83FC
H'FFFF83FE
Bit
Item
15 14 13 12 11 10 9
87654
3210
Bit name ― ― ― ― ― ― AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W
RRRRRRRRRRRRRRRR
A/D Control/Status Register (ADCSR)
H'FFFF83E0
Bit
Item
7
6
5
4
3
Bit name ADF
ADIE
ADST
CKS
GRP
Initial value
0
0
0
0
0
R/W
R/(W)*
R/W
R/W
R/W
R/W
Note: * Only 0 can be written to bit 7 to clear the flag.
2
CH2
0
R/W
8/16
1
CH1
0
R/W
0
CH0
0
R/W
Bit
Name
7
A/D End Flag (ADF)
6
A/D Interrupt Enable (ADIE)
Value
0
1
0
1
Description
Clear conditions:
(initial value)
• With ADF = 1, by reading the ADF flag then writing 0
in ADF
• When the DMAC is activated by an ADI interrupt
Set conditions:
• Single mode: When A/D conversion ends after
conversion for all designated channels*
• Scan mode: After one round of A/D conversion for
all specified channels
Disables interrupt requests (ADI) after A/D conversion
ends
(initial value)
Enables interrupt requests (ADI) after A/D conversion
ends
Rev.5.00 Sep. 27, 2007 Page 654 of 716
REJ09B0398-0500