SH7014 Datasheet, PDF (666/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
MTU
Bit
3 to 0
Name
I/O Control A3 to A0 0
(IOA3 to IOA0)
1
Value
00
1
10
1
00
1
10
1
Description
0 TGR1A is Output disabled
(initial value)
1 ^{an output} Initial output is 0 Output 0 on compare-match
0
compare
register
Output 1 on compare-match
1
Toggle output on compare-
match
0
Output disabled
1
Initial output is 1 Output 0 on compare-match
0
Output 1 on compare-match
1
Toggle output on compare-
match
0 TGR1A is Capture input
1 ^{an input}
0
capture
register
1
source is the
TIOC1A pin
Input capture on rising edge
Input capture on falling edge
Input capture on both edges
0
Capture input Input capture on channel
1
source TGR0A 0/TGR0A compare-
0
compare/match match/input capture
input capture generation
1
Rev.5.00 Sep. 27, 2007 Page 632 of 716
REJ09B0398-0500