SH7014 Datasheet, PDF (246/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Bits 3 to 0⎯I/O Control A3 to A0 (IOA3 to IOA0): These bits set the TGR1A register function.
Bit 3
IOA3
0
1
Bit 2
IOA2
0
1
0
1
Bit 1
IOA1
0
1
0
1
0
1
0
1
Bit 0
IOA0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
TGR1A
is an output
compare
register
Output disabled
(initial value)
Initial output is 0 Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Output disabled
Initial output is 1 Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
TGR1A
is an input
capture
register
Capture input
source is the
TIOC1A pin
Input capture on rising edge
Input capture on falling edge
Input capture on both edges
Capture input Input capture on channel
source is TGR0A 0/TGR0A compare-match/input
compare-
capture generation
match/input
capture
Rev.5.00 Sep. 27, 2007 Page 212 of 716
REJ09B0398-0500