SH7014 Datasheet, PDF (676/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
MTU
Timer Counters 2 (TCNT2)
H'FFFF82A6
16/32
Bit
Item
15 14 13 12 11 10 9
87654
3210
Bit name
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Timer General Register 2 (TGR2)
H'FFFF82A8 (2A)
H'FFFF82AA (2B)
16/32
Bit
Item
15 14 13 12 11 10 9
87654
3210
Bit name
Initial value 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Timer Start Register (TSTR)
H'FFFF8240
8/16/32
Bit
Item
7
6
5
4
3
2
1
0
Bit name
―
―
―
―
―
CST2
CST1
CST0
Initial value
0
0
0
0
0
0
0
0
R/W
R
R
R
R
R
R/W
R/W
R/W
Bit
Name
Value
Description
2 to 0 Counter Start 2 to 0
(CST2 to CST0)
0 TCNTn count is halted
1 TCNTn count
(initial value)
Note: n = 2 to 0
If 0 is written to the CST bit during operation with the TIOC pin in output status, the counter stops, but
the TIOC pin output compare output level is maintained. If a write is done to the TIOR register while the
CST bit is a 0, the pin output level is updated to the established initial output value.
Rev.5.00 Sep. 27, 2007 Page 642 of 716
REJ09B0398-0500