SH7014 Datasheet, PDF (559/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

18. 128 kB Flash Memory (F-ZTAT)
18.8.2 Software Protection
Software protection can be implemented by setting the SWE bit in FLMCR1, erase block register
1 (EBR1) and the RAMS bit in the RAM emulation register (RAMER). When software protection
is in effect, setting the P or E bit in flash memory control register 1 (FLMCR1) does not cause a
transition to program mode or erase mode. (See table 18.9.)
Table 18.9 Software Protection
Functions
Item
Description
Program Erase
SWE pin protection • Clearing the SWE bit to 0 in FLMCR1 sets Yes
Yes
the program/erase-protected state for all
blocks.
(Execute in on-chip RAM or external
memory.)
Block specification • Erase protection can be set for individual ⎯
Yes
protection
blocks by settings in erase block register 1
(EBR1).
• Setting EBR1 to H'00 places all blocks in the
erase-protected state.
Emulation protection • Setting the RAMS bit to 1 in the RAM
Yes
Yes
emulation register (RAMER) places all blocks
in the program/erase-protected state.
Rev.5.00 Sep. 27, 2007 Page 525 of 716
REJ09B0398-0500