SH7014 Datasheet, PDF (266/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Input Capture Operation: Figure 10.13 shows input capture. The falling edge of TIOCB and
both edges of TIOCA are selected as input capture input edges. In the example, TCNT is set to
clear at the input capture of the TGRB register.
TCNT value
H'0180
H'0160
H'0010
H'0005
H'0000
Counter cleared
by TIOCB input
(falling edge)
Time
TIOCA
TGRA
TIOCB
H'0005
H'0160
H'0010
TGRB
H'0180
Figure 10.13 Input Capture Operation
10.4.3 Synchronous Operation
In the synchronizing mode, two or more timer counters can be rewritten simultaneously
(synchronized preset). Multiple timer counters can also be cleared simultaneously using TCR
settings (synchronized clear).
The synchronizing mode can increase the number of TGR registers for a single time base. All
three channels can be set for synchronous operation.
Rev.5.00 Sep. 27, 2007 Page 232 of 716
REJ09B0398-0500