MEC1404 Datasheet, PDF (78/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
APPLICATION NOTE: Methods for putting the device back to sleep after a debug access.
Option 1: Automatically Re-enter Sleep after Debug Wake Event (preferred)
To automatically re-enter sleep after a debug wake event the firmware should follow this recommended usage model
1. FW has decided to go to sleep.
2. Set sleep_all bit to command all blocks to sleep.
3. Set sleep_debug bit.
4. Set auto_clr_sleep to make sure sleep_all and sleep_debug will clear automatically when the processor vec-
tors to an interrupt.
Note:
• Steps 2-4 can be done in one write to System Sleep Control Register (SYS_SLP_CNTRL) register.
• The sleep_all and the sleep_debug bits MUST not be set in an interrupt handler.
5. Issue processor sleep instuction. Note that you must use a do...while around the sleep instruction (WAIT) .
Stay in loop while sleep_debug bit is still set.
6. processor goes to sleep.
Option 2: Debug_Done Interrupt Event
Firmware can enable the Debug_Done interrupt event before issuing the processor sleep instruction. This bit is asserted
when the debugger accesses the device. However, the user code will not see this event until the debugger has com-
pleted its debug task. Once the user code sees this event the chip may be put back into a sleep state. Note that the
sleep control bits may have been modified by the debug activity, so some additional reprogramming may be necessary.
3.8 EC-Only Registers
TABLE 3-10: EC-ONLY REGISTER BASE ADDRESS TABLE
Block Instance
Instance
Number
Host
Address Space
PCR
0
EC
32-bit internal
address space
Base Address
0008_0100h
TABLE 3-11:
Offset
00h
04h
08h
0Ch
10h
14h
18h
20h
24h
28h
2Ch
30h
POWER, CLOCKS AND RESET VTR-POWERED REGISTERS SUMMARY
Register Name
Test Register
Test Register
EC Sleep Enable Register (EC_SLP_EN)
EC Clock Required Status Registers (EC_-
CLK_REQ_STS)
Host Sleep Enable Register (HOST_SLP_EN)
Host Clock Required Status Registers (HOST_-
CLK_REQ)
System Sleep Control Register (SYS_SLP_CNTRL)
Processor Clock Control Register (PROC_CLK_CN-
TRL)
EC Sleep Enable 2 Register (EC_SLP_EN2)
EC Clock Required 2 Status Register (EC_-
CLK_REQ2_STS)
Slow Clock Control Register (SLOW_CLK_CNTRL)
Oscillator ID Register (CHIP_OSC_ID)
DS00001956D-page 78
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