MEC1404 Datasheet, PDF (166/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
10.9.3 RESETS
nSYSRST
Name
Description
This signal resets all the registers and logic in this block to their default
state.
10.10 Low Power Modes
The JTVIC always operates in the lowest power state; gating its own clock when it is not required. The only time this
block requires the 48 MHz Ring Oscillator is for register reads/writes and for propagating interrupt events to the embed-
ded controller.
If the 48 MHz Ring Oscillator is off, the wake-capable interrupts may be used to resume operation thereby allowing the
interrupt events to propagate to the embedded controller.
10.11 Description
10.11.1 FEATURES
• Supports up to 1024 Interrupt Sources
• Aggregated and Disaggregated Modes of Operation
- Aggregated Mode offers a programmable Vector Offset per GIRQ
- Disaggregated Mode offers a programmable Vector Offset per Source Bit
• 4 levels of configurable priority
10.11.2 OVERVIEW
This module is a highly-configurable and expandable vectored interrupt controller which is designed to work with an
MIPS M14k processor’s EIC (External Interrupt Controller) mode of interrupt operation, with direct vector addressing
(i.e. direct address driven into the processor instead of an “interrupt vector number”). The controller supports four levels
of priority on a per-interrupt-source basis.
The controller operates in two different modes, aggregated and dis-aggregated (or mini-jump-table), on a grouped-IRQ
(GIRQ) basis. NOTE: a GIRQ is a grouping of up to 32 interrupt sources.
Thus this controller can be configured as fully aggregated all the way to fully dis-aggregated, and everything in between.
In aggregated mode the controller stores ISR vector addresses in local registers, thus saving firmware from having to
build ISR jump tables in local SRAM. One vector address per GIRQ.
In dis-aggregated/jump-table mode, the controller can selectively break apart individual GIRQ interrupt sources into
separate vector addresses.
DS00001956D-page 166
 2015 - 2016 Microchip Technology Inc.