MEC1404 Datasheet, PDF (297/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset ^10h
Bits
Description
Type
6 RELOAD
R/W
This bit reloads the counter without interrupting it operation. This will
not function if the timer has already completed (when the START bit
in this register is ‘0’). This is used to periodically prevent the timer
from firing when an event occurs. Usage while the timer is off may
result in erroneous behavior.
5 START
R/W
This bit triggers the timer counter. The counter will operate until it
hits its terminating condition. This will clear this bit. It should be
noted that when operating in restart mode, there is no terminating
condition for the counter, so this bit will never clear. Clearing this bit
will halt the timer counter.
Setting this bit will:
 Reset the clock divider counter.
 Enable the clock divider counter.
 Start the timer counter.
 Clear all interrupts.
Clearing this bit will:
 Disable the clock divider counter.
 Stop the timer counter.
4 SOFT_RESET
WO
This is a soft reset.
This is self clearing 1 cycle after it is written.
3 AUTO_RESTART
R/W
This will select the action taken upon completing a count.
1=The counter will automatically restart the count, using the contents
of the Timer Preload Register to load the Timer Count Register
The interrupt will be set in edge mode
0=The counter will simply enter a done state and wait for further con-
trol inputs. The interrupt will be set in level mode.
2 COUNT_UP
R/W
This selects the counter direction.
When the counter in incrementing the counter will saturate and trig-
ger the event when it reaches all F’s. When the counter is decre-
menting the counter will saturate when it reaches 0h.
1=The counter will increment
0=The counter will decrement
1 Reserved
R
0 ENABLE
R/W
This enables the block for operation.
1=This block will function normally
0=This block will gate its clock and go into its lowest power state
Default
0h
Reset
Event
Tim-
er_Reset
0h
Tim-
er_Reset
0h
Tim-
er_Reset
0h
Tim-
er_Reset
0h
Tim-
er_Reset
-
-
0h
Tim-
er_Reset
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DS00001956D-page 297