MEC1404 Datasheet, PDF (443/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
35.7 EC-Only Registers
TABLE 35-1: EC-ONLY REGISTER BASE ADDRESS TABLE
Block Instance
VBAT_REG_BANK
Instance
Number
0
Host
EC
Address Space
32-bit internal
address space
Base Address
0000_A400h
Note 35-1 The Base Address indicates where the first register can be accessed in a particular address space
for a block instance.
TABLE 35-2: RUNTIME REGISTER SUMMARY
Offset
00h
04h
08h
10h
14h
18h
1Ch
Register Name
Power-Fail and Reset Status Register
Test Register
Clock Enable Register
Test Register
Test Register
Alternate Function VTR Control
Test Register
35.7.1 POWER-FAIL AND RESET STATUS REGISTER
The Power-Fail and Reset Status Register collects and retains the VBAT RST and WDT event status when VTR is
unpowered.
Address ^00h
Bits
Description
7 VBAT_RST
The VBAT RST bit is set to ‘1’ by hardware when a VBAT_POR is
detected. This is the register default value. To clear VBAT RST EC
firmware must write a ‘1’ to this bit; writing a ‘0’ to VBAT RST has
no affect.
6 Reserved
5 WDT
The WDT bit is asserted (‘1’) following a Watch-Dog Timer Forced
Reset (WDT Event). To clear the WDT bit EC firmware must write
a ‘1’ to this bit; writing a ‘0’ to the WDT bit has no affect.
Type
R/WC
RES
R/WC
Default
1
Reset
Event
VBAT_
POR
-
0
(Note 35-
2)
-
VBAT_
POR
(Note 3
5-2)
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DS00001956D-page 443