MEC1404 Datasheet, PDF (206/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
12.9.2 EC-TO-HOST MAILBOX REGISTER
Offset ^01h
Bits
Description
Type
7:0 EC_HOST_MBOX
8-bit mailbox used communicate information from the embedded
controller to the system host. Writing this register generates an
event to notify the system host.
The system host has the option of clearing some or all of the bits in
this register. This is dependent on the protocol layer implemented
using the EMI Mailbox. The embedded controller must know this
protocol to determine the meaning of the value that will be reported
on a read.
This bit field is aliased to the EC_HOST_MBOX bit field in the EC-
to-HOST Mailbox Register
12.9.3 EC ADDRESS LSB REGISTER
R/WC
Default
0h
Reset
Event
nSYSR
ST
Offset ^02h
Bits
Description
Type
7:2 EC_ADDRESS_LSB
R/W
This field defines bits[7:2] of EC_Address [15:0]. Bits[1:0] of the
EC_Address are always forced to 00b.
The EC_Address is aligned on a DWord boundary. It is the address
of the memory being accessed by EC Data Byte 0 Register, which
is an offset from the programmed base address of the selected
REGION.
1:0 ACCESS_TYPE
R/W
This field defines the type of access that occurs when the EC Data
Register is read or written.
11b=Auto-increment 32-bit access.
10b=32-bit access.
01b=16-bit access.
00b=8-bit access.
Each of these access types are defined in detail in Section 12.8.3,
"Access Types".
Default
0h
Reset
Event
nSYSR
ST
0h
nSYSR
ST
DS00001956D-page 206
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