MEC1404 Datasheet, PDF (299/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
TABLE 19-1: CLOCKING AND RESETS SIGNAL DESCRIPTION TABLE
NAME
nSYSRST
48 MHz Ring Oscillator
32KHz_Clk
DIRECTION
Input
Input
Input
DESCRIPTION
Reset asserted when power is applied to this block
System Clock
Timer Clock
19.4.3 INTERRUPT INTERFACE
This section defines the interrupt Interface signals routed to the chip interrupt aggregator.
TABLE 19-2: INTERRUPT INTERFACE SIGNAL DESCRIPTION TABLE
NAME
RTOS_TIMER
DIRECTION
Output
DESCRIPTION
RTOS Timer Interrupt Event
19.4.4 SLEEP INTERFACE
TABLE 19-3: SIDEBAND SIGNALS SIGNAL DESCRIPTION TABLE
NAME
Sleep Enable
Clock Required
DIRECTION
Input
Output
DESCRIPTION
Firmware Sleep Request to turn off 48 MHz Ring Oscillator to this
block.
Note:
This input is controlled by the RTOS Timer Sleep Enable
bit located in the chip’s EC Sleep Enable 2 Register
(EC_SLP_EN2) on page 87.
Signal indicating this block requires the 48 MHz Ring Oscillator
for operation.
Note:
Firmware may read the value of the RTOS Timer Clock
Required signal in the chip’s EC Clock Required 2
Status Register (EC_CLK_REQ2_STS) on page 89.
19.4.5 SIDEBAND SIGNALS
TABLE 19-4: INTERRUPT INTERFACE SIGNAL DESCRIPTION TABLE
NAME
Halt
DIRECTION
Input
DESCRIPTION
RTOS Timer Halt signal.
Note:
This signal is connected to the same signal that halts the
embedded controller during debug (e.g., JTAG
Debugger is active, break points, etc.).
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DS00001956D-page 299