MEC1404 Datasheet, PDF (128/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset ^08h
Bits
Description
Type
4 CONFIG_ERR
This bit is set to 1 whenever EN_INTERNAL_ERR is 1 and an LPC
Configuration access causes an internal bus error. Once set, it
remains set until cleared by being written with a 1.
3 RUNTIME_ERR
This bit is set to 1 whenever EN_INTERNAL_ERR is 1 and an LPC
I/O access causes an internal bus error. This error will only occur if
a BAR is misconfigured. Once set, it remains set until cleared by
being written with a 1.
2 BAR_CONFLICT
This bit is set to 1 whenever a BAR conflict occurs on an LPC
address. A Bar conflict occurs when more than one BAR matches
the address during of an LPC cycle access. Once this bit is set, it
remains set until cleared by being written with a 1.
1 EN_INTERNAL_ERR
When this bit is 0, only a BAR conflict, which occurs when two
BARs match the same LPC I/O address, will cause LPC_INTER-
NAL_ERR to be set. When this bit is 1, internal bus errors will also
cause LPC_INTERNAL_ERR to be set.
0 LPC_INTERNAL_ERR
This bit is set whenever a BAR conflict or an internal bus error
occurs as a result of an LPC access. Once set, it remains set until
cleared by being written with a 1. This signal may be used to gen-
erate interrupts. See Section 4.6, "Interrupts," on page 103.
R/WC
R/WC
R/WC
R/W
R/WC
Default
0h
Reset
Event
nSYSR
ST
0h
nSYSR
ST
0h
nSYSR
ST
0h
nSYSR
ST
0h
nSYSR
ST
4.11.3 EC SERIRQ REGISTER
Offset ^0Ch
Bits
Description
31:1 RESERVED
0 EC_IRQ
If the LPC Logical Device is selected as the source for a Serial
Interrupt Request by an Interrupt Configuration register (see Sec-
tion 4.8.4.8, "SERIRQ Interrupts," on page 115), this bit is used as
the interrupt source.
Type
RES
R/W
Default
-
0h
Reset
Event
-
nSYSR
ST
DS00001956D-page 128
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