MEC1404 Datasheet, PDF (168/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
FIGURE 10-3:
INTERRUPT SOURCE, ENABLE, AND RESULT LOGIC
Interrupt Event
Interrupt
Source
Wake Event
Interrupt Result
Clock
Interrupt
Enable
10.11.3.1 GIRQ16 and GIRQ22 Wake-Only Events
GIRQ16 and GIRQ22 are reserved for Wake-Only events that do not require functional software service.
TABLE 10-1: WAKE-ONLY EVENTS
Wake Event
Description
LPC_WAKE
SMB_WAKE
PS2_DATx_WAKE
KSC_INT_WAKE
DEBUG_DONE
ESPI_WAKE
This bit is set when the LPC interface detects activity on the interface. It’s sole
purpose is to restart the 48 MHz Ring Oscillator.
This bit is set when an i2c/SMBus interface detects a START event on the inter-
face. It’s sole purpose is to restart the 48 MHz Ring Oscillator.
This bit is set when the PS/2 interface detects activity on it’s interface. It’s sole
purpose is to restart the 48 MHz Ring Oscillator.
This bit is set when the Keyboard Matrix Scan Controller detects activity on it’s
interface. It’s sole purpose is to restart the 48 MHz Ring Oscillator.
This bit is set when the ICSP debugger interface detects activity on the interface.
It’s sole purpose is to notify the EC firmware that the 48 MHz Ring Oscillator was
taken out of sleep state by the debug interface.
This bit is set when the eSPI interface detects activity on the interface. It’s sole
purpose is to restart the 48 MHz Ring Oscillator.
GIRQ16 will generate both a wake event and an interrupt vector to the EIC Interrupt Interface. This will require the
embedded firmware to clear the interrupt status event and re-execute the sleep instruction. GIRQ16 is a legacy interrupt
used to ensure the 48 MHz Ring Oscillator remained on for the minimum time. This interrupt may be deprecated in future
designs
GIRQ22 does not generate an interrupt vector to the EIC Interrupt Interface. GIRQ22 only generates a wake event to
restart the 48 MHz Ring Oscillator running. Hardware automatically wakes the oscillator to process the wake event,
clears the event, and resumes sleeping without firmware intervention.
Note: The sleeping state of the chip is determined by bits[2:0] of the System Sleep Control Register (SYS-
_SLP_CNTRL) on page 86
APPLICATION NOTE: Configuring Wake-Only Events
Wake-Only interrupt event should be enabled just before executing the EC sleep instruction. Firmware should execute
the following sequence of events:
1. Set bits[2:0] in the System Sleep Control Register (SYS_SLP_CNTRL)
2. Enable Wake Events in either GIRQ16 or GIRQ22
3. Execute Sleep Instruction (_wait;)
For example, in order to enable LPC transactions to MEC140X/1X Logical Devices while the MEC140X/1X is in a Sleep
mode in which the main oscillator is shut off, just before entering sleep EC firmware must enable one of the LPC_WAKE
interrupts. The firmware designer may choose either the LPC_WAKE located in GIRQ16 or in GIRQ22. When respond-
ing to the GIRQ16 interrupt EC firmware should disable the LPC_WAKE interrupt until firmware determines that it is
again appropriate to enter a Deep Sleep mode. GIRQ22 handles this automatically in hardware.
DS00001956D-page 168
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