MEC1404 Datasheet, PDF (373/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
Offset ^00h
Bits
Description
10 TACH_READING_MODE_SELECT
Type
R/W
1=Counter is incremented on the rising edge of the 100kHz_Clk input.
The counter is latched into the TACHX_COUNTER field and
reset when the programmed number of edges is detected.
0=Counter is incremented when TACHx Input transitions from low-to-
high state (default)
9 Reserved
R
8 FILTER_ENABLE
R/W
This filter is used to remove high frequency glitches from TACHx
Input. When this filter is enabled, TACHx input pulses less than two
100kHz_Clk periods wide get filtered.
1= Filter enabled
0= Filter disabled (default)
It is recommended that the TACHx input filter always be enabled.
7:2 Reserved
R
1 TACH_ENABLE
R/W
This bit gates the clocks into the block. When clocks are gated, the
TACHx pin is tristated. When re-enabled, the internal counters will
continue from the last known state and stale status events may still
be pending. Firmware should discard any status or reading values
until the reading value has been updated at least one time after the
enable bit is set.
1= TACH Monitoring enabled, clocks enabled.
0= TACH Idle, clocks gated
0 TACH_OUT_OF_LIMIT_ENABLE
R/W
This bit is used to enable the TACH_OUT_OF_LIMIT_STATUS bit in
the TACHx Status Register to generate an interrupt event.
1=Enable interrupt output from Tachometer block
0=Disable interrupt output from Tachometer block (default)
Default
0b
Reset
Event
nSYSR
ST
-
-
0b
nSYSR
ST
-
-
0b
nSYSR
ST
0b
nSYSR
ST
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DS00001956D-page 373