MEC1404 Datasheet, PDF (280/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
17.11.1 RECEIVE BUFFER REGISTER
Offset ^{0h (DLAB=0)}
Bits
Description
Type
7:0 RECEIVED_DATA
R
This register holds the received incoming data byte. Bit 0 is the
least significant bit, which is transmitted and received first.
Received data is double buffered; this uses an additional shift reg-
ister to receive the serial data stream and convert it to a parallel 8
bit word which is transferred to the Receive Buffer register. The
shift register is not accessible.
Default
0h
Reset
Event
RESET
17.11.2 TRANSMIT BUFFER REGISTER
Offset ^{0h (DLAB=0)}
Bits
Description
7:0 TRANSMIT_DATA
This register contains the data byte to be transmitted. The trans-
mit buffer is double buffered, utilizing an additional shift register
(not accessible) to convert the 8 bit data word to a serial format.
This shift register is loaded from the Transmit Buffer when the
transmission of the previous byte is complete.
Type
W
Default
0h
Reset
Event
RESET
17.11.3 PROGRAMMABLE BAUD RATE GENERATOR LSB REGISTER
Offset ^{00h (DLAB=1)}
Bits
Description
7:0 BAUD_RATE_DIVISOR_LSB
See Section 17.9.1, "Programmable Baud Rate".
Type
R/W
Default
0h
Reset
Event
RESET
DS00001956D-page 280
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