MEC1404 Datasheet, PDF (430/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
33.0 PORT 80 BIOS DEBUG PORT
33.1 Overview
The Port 80 BIOS Debug Port emulates the functionality of a “Port 80” ISA plug-in card. In addition, a timestamp for
the debug data can be optionally added.
Diagnostic data is written by the Host Interface to the Port 80 BIOS Debug Port, which is located in the Host I/O address
space. The Port 80 BIOS Debug Port generates an interrupt to the EC when host data is available. The EC reads
this data along with the timestamp, if enabled.
33.2 References
There are no references for this block.
33.3 Interface
This block is designed to be accessed externally via the pin interface and internally via a registered host interface.
FIGURE 33-1:
I/O DIAGRAM OF BLOCK
Port 80 BIOS Debug Port
Host Interface
Clock Inputs
Resets
Interrupts
Signal Description
33.4 Signal Description
There are no external signals for this block.
33.5 Host Interface
The Port 80 block is accessed by host software via a registered interface, as defined in Section 33.11, "Runtime Reg-
isters".
DS00001956D-page 430
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