MEC1404 Datasheet, PDF (380/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
27.11.1 PWMX COUNTER ON TIME REGISTER
Offset ^00h
Bits
Description
31:16 Reserved
15:0 PWMX_COUNTER_ON_TIME
This field determine both the frequency and duty cycle of the PWM
signal.
When this field is set to zero and the PWMX_COUNTER_OFF_-
TIME is not set to zero, the PWM_OUTPUT is held low (Full Off).
Type
R
R/W
Default
-
0000h
Reset
Event
-
nSYSRS
T
27.11.2 PWMX COUNTER OFF TIME REGISTER
Offset ^04h
Bits
Description
31:16 Reserved
15:0 PWMX_COUNTER_OFF_TIME
This field determine both the frequency and duty cycle of the PWM
signal.
When this field is set to zero, the PWM_OUTPUT is held high (Full
On).
Type
R
R/W
Default
-
FFFFh
Reset
Event
-
nSYSRS
T
27.11.3 PWMX CONFIGURATION REGISTER
Offset ^08h
Bits
Description
31:7 Reserved
6:3 CLOCK_PRE_DIVIDER
The Clock source for the 16-bit down counter (see PWMx Counter
ON Time Register and PWMx Counter OFF Time Register) is deter-
mined by bit D1 of this register. The Clock source is then divided by
the value of Pre-Divider+1 and the resulting signal determines the
rate at which the down counter will be decremented. For example, a
Pre-Divider value of 1 divides the input clock by 2 and a value of 2
divides the input clock by 3. A Pre-Divider of 0 will disable the Pre-
Divider option.
2 INVERT
Type
R
R/W
R/W
1= PWM_OUTPUT ON State is active low
0=PWM_OUTPUT ON State is active high
1 CLOCK_SELECT
R/W
This bit determines the clock source used by the PWM duty cycle
and frequency control logic.
1=CLOCK_LOW
0=CLOCK_HIGH
Default
-
0000b
Reset
Event
-
nSYSRS
T
0b
nSYSRS
T
0b
nSYSRS
T
DS00001956D-page 380
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