MEC1404 Datasheet, PDF (477/572 Pages) Microchip Technology – Keyboard and Embedded Controller Products for Notebook PC

MEC140X/1X
TABLE 40-1: SIGNAL DESCRIPTION TABLE (CONTINUED)
Name
CMP_VOUT0
CMP_VOUT1
Direction
Output
Output
Comparator 0 output
Comparator 1 output
Description
40.6 Host Interface
The registers defined for the Comparator Interface are only accessible by the embedded controller. The Comparator
Registers for both comparators are located in one register in the EC Subsystem register bank. See Section 34.8.2,
"Comparator Control," on page 439.
40.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
40.7.1 POWER DOMAINS
Name
Description
VTR
The logic implemented in this block are powered by this power well.
40.7.2 CLOCK INPUTS
This component does not require a clock input.
40.7.3 RESETS
Name
Description
VTR_RESET#
This signal resets all the register in the EC Subsystem that interact with
the comparators.
40.8 Interrupts
The comparators do not have a dedicated interrupt output event. An interrupt can be generated by the GPIO which
shares the pin with the comparator output signal.
• GPIO124/CMP_VOUT0
• GPIO120/CMP_VOUT1
The GPIO interrupt is very configurable, thereby allowing CMP_VOUTx signal to generate an event when the
CMP_VINx input is greater than the CMP_VREFx input or when it is less than the CMP_VREFx input. See the definition
of Bits[7:4] of the Pin Control Register on page 335.
40.9 Low Power Modes
Each comparator is in its lowest powered state when its ENABLE bit is ‘0’.
40.10 Description
The Analog Comparator compares the analog voltage on an input pin to a reference voltage and generates an output
that indicates the result of the comparison. The reference voltage can be derived either from an external pin or from the
internal Digital Analog Converter.
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DS00001956D-page 477